This article presents the SPI port and an AT25128 hardware.
Let to see the four bits of the SPI port (named SSC0) of the xc164cm microcontroller, the philosophy of SPI is the same for all of microcontrollers.
1. Chip select bit, CS, it is the p3.6 bit of the simple parallel port P3 of the microcontroller. When low it selects the eeprom chip. It is connected to pin 1 of the eeprom chip (8-lead SOIC eeprom package). Name given by DAVE is P3_P6 .
You have to understand and to remember that nothing in our world is running with the speed of light , in accordance to the Theory of Relativity of Albert Einstein, so a chip select signal applied to the memory chip is not recognized by the memory chip automatically ! , a typical time to pass for recognization is about 250 nsec , so you have to wait for at least 250 nsec to proceed to the next insruction to the memory. To do a delay of 250 nsec we can use a timer ,included in microcontroller chip.
2. Master transmit slave receive ,MTSR, (microcontroller is the master), it is the P3_P9 bit of the parallel port P3 (alternative configuration), connected to 5 pin of eeprom.
3. Master receive slave transmit, MRST, it is the P3_P8 bit (alternative configuration),connected to pin 2 of eeprom.
4. Serial clock , SCLK, it is the P3_13 bit of the parallel port P3 (alternative configuration) connected to pin 6 of eeprom. SCLK is used to syncronize read and write operations between master (microcontroller) and slave (eeprom).
A very important register of the SPI is the status register, 16 bits long , named SSC0_CON .
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
(EN) (MS) ( -) (A REN) (BEN) (PEN) (REN) (TEN) (LB) (PO) (PH) (HB) (BM, 4 bits long)
A very useful bit is bit 15 , (EN) (DAVE name SSC0_CON_EN ):
when EN=0 then the content of the status register is used to initialize the SPI, configuring it (configuring the baud rate of the spi for example).EN=0 is set for the first time only.when EN=0
transmiting and receiving are disabled
After it we set EN=1, enabling transmiting and receiving and using bit 12 (DAVE name SSC0_CON_AREN_BSY) as a BUSY flag , polling it and controlling transmission and reception.
Transmission or reception of instructions or data is done simply loading the transmit or receive buffers of SPI and leave the shift register (the door of the SPI) to transmit or receive bit to bit.
About AT25128 spi serial eeprom.
It is a 128 kbits memory,organized as 16 kbytes . It accepts six instructios, that we will use.
A very useful register of the serial eeprom is the status register, 8 bits long :
bit7 6 5 4 3 2 1 0
WPEN X X X BP1 BP0 WEN RDY
Bit 0 = “0” (RDY) indicates the device is READY.
Bit 0 = “1” indicates the write cycle is in progress
So, to be able to read the status register of the eeprom we have to wait to see if bit 0=0 (polling this bit). when memory receives the instruction WRITE then it begins a self-writing mode and so we have to wait to see if the self-writing mode is finished, examing the status of bit 0.
Bit 1 = “0” indicates the device is not WRITE ENABLED. Bit 1 = 1
indicates the device is WRITE ENABLED.
Data can be read one byte at a time, or for any arbitrary number of bytes as long as the chip select signal
remains asserted and SPI clock pulses are delivered to the EEPROM IC. The two data bytes following the
READ instruction represent the address to be read. An internal address counter is automatically
incremented after each byte is read, allowing multiple bytes to be read with a single READ instruction.
Before writing data to the EEPROM, the EEPROM must be placed in the “write enable” state. The write sequence is therefore typically composed of two instructions in succession: a WRITE ENABLE instruction,followed immediately by a WRITE instruction. The “write enable” state is cleared by the write operation, anda new WRITE ENABLE instruction is required before each write operation.
The C code will be published at next article No 39.